The semiconductor device industry has a market-driven need to continue to reduce the size of semiconductor devices to obtain higher performance and lower power consumption. To increase the amount of memory in a limited space, memory devices may be stacked in a vertical arrangement. Electrical connections through a memory device substrate may be provided by conductive vias, each at least partially through the substrate, from one surface of the memory chip substrate to the other surface. When silicon technology is used, these may be referred to as through silicon vias. The ability to save space by stacking and directly connecting memory chips with high reliability electrical connections becomes more difficult as dimensions are reduced.